30 五月, 2008 04:27
决定下来管理这个部门之后，随之而来的事务越来越多。
不知不觉，一个月就要过去了。
这个月主要是进行招聘，谈话，项目协调。部门的人员越来越多，现在已经22人。未来会扩展到30人左右，也有可能在40人左右。
谈话，必不可少。从上而下的交流，是最容易，而且也是最有效的。尤其是20人以上的团队。但是并不是每个管理者都能够意识到这个的必要性。更别说注意谈话的一些细节了。
谈话，最主要的目的是让沟通，了解对方的想法，传达自己的想法。 其中必不可少的，是引导、鼓励、指正。这样才能更好的使得团队的成员和领导者的想法一致，步伐一致。这样整个团队才更有凝聚力。
现在还需要继续完善部门内部的谈话机制，另外合适的机会，提议上级领导也注意谈话。
26 五月, 2008 01:01
May 25 14:37:01 www16 postfix/smtpd[88473]: sql_select option missing
May 25 14:37:01 www16 postfix/smtpd[88473]: auxpropfunc error no mechanism available
May 25 14:41:00 www16 postfix/smtpd[88741]: sql_select option missing
May 25 14:41:00 www16 postfix/smtpd[88741]: auxpropfunc error no mechanism available
May 25 14:42:10 www16 postfix/smtpd[88907]: sql_select option missing
May 25 14:42:10 www16 postfix/smtpd[88907]: auxpropfunc error no mechanism available
May 25 14:42:10 www16 postfix/smtpd[88908]: sql_select option missing
May 25 14:42:10 www16 postfix/smtpd[88908]: auxpropfunc error no mechanism available
May 25 14:48:32 www16 postfix/smtpd[89400]: sql_select option missing
May 25 14:48:32 www16 postfix/smtpd[89400]: auxpropfunc error no mechanism available
May 25 14:51:32 www16 postfix/smtpd[89610]: sql_select option missing
May 25 14:51:32 www16 postfix/smtpd[89610]: auxpropfunc error no mechanism available
May 25 14:59:59 www16 postfix/smtpd[90073]: sql_select option missing
系统日志 出现大量的类似日志，虽然不影响使用，但是却扰乱日志记录。
修改smtpd.conf文件的配置，配置如下：
# cat /usr/local/lib/sasl2/smtpd.conf
pwcheck_method: authdaemond
mech_list: plain login
allow_plaintext: true
auxprop_plugin: mysql
authdaemond_path:/var/run/authdaemond/socket
sql_hostnames: localhost
sql_user: postfix
sql_passwd: postfix
sql_database: postfix
sql_select: select password from mailbox where username='%u'
20 五月, 2008 07:17
Controlling how web pages are cached is basically done using 2 kind of headers: Expires and Cache-Control
Using the Expire header is really simple. It tells when the page the browser or the proxy downloaded should be fetched again from the web server. In order to use it in your CGI or PHP page, just after the Content-type, you can add the the expire header as shown below:
// calc an offset of 24 hours
$offset = 3600 * 24;
// calc the string in GMT not localtime and add the offset
$expire = "Expires: " . gmdate("D, d M Y H:i:s", time() + $offset) . " GMT";
//output the HTTP header
Header($expire);
The Cache-Control HTTP Headers is part of the HTTP 1.1 standard. Here you are an example:
Cache-Control: max-age=3600, must-revalidate
It has a certain number of parameters that can be used:
- max-age=seconds - the number of seconds from the time of the request you wish this objcet to be keep into the cache;
- s-maxage=seconds - like max-age but it only applies to proxy;
- public - tell to handle the content has cacheable even if it would normally be uncacheable, it is used for example for authenticated pages;
- no-cache - force both proxy and browser to validate the document before to provide a cached copy;
- must-revalidate - tell the browser to obey to any information you give them about a webpage;
- proxy-revalidate - like must-revalidate but applies to proxy;
More Headers
But that's not all, you have to consider other 2 headers: Content-Length and Last-Modified.
The Last-Modified is the easier, you just have to output a date in GMT for example:
$gmt_mtime = gmdate('D, d M Y H:i:s', time() ) . ' GMT';
header("Last-Modified: " . $gmt_mtime );
Content-Lenght is the harder because you don't know how long is a php page before processing it. If you output a file, for example and image or a PDF, it is simple because before of starting the output you can read the filesize. With dynamic page you have to use the special OB library, see the example:
ob_start();
... your php code ...
... your php code ...
... your php code ...
header('Content-Length: ' . ob_get_length());
ob_end_flush();
The advantage is that you can use:
ob_start('ob_gzhandler');
to have automatically compressed pages in output for faster downloading. Usefull Links
Finally if you want to check the cacheability of your pages there are some urls available:
- Cacheability Engine Query
- the CacheNow! campaign
18 五月, 2008 18:13
新功能：
- 增加Whois功能，可以查询域名和IP注册信息
- 增加批量删除、修改域名、记录功能
- 增加域名、区域管理后确认功能，修改、删除域名、记录、区域后，需要应用确认才能生效
- 增加DNS日志错误关键字加亮功能
- 增加记录系统启动时间
修复BUG：
升级：
- 基础系统升级到FreeBSD6.3
- BIND，升级到bind-9.4.2
其他：
- 更换WEB界面模板，更漂亮、更易用
- 细化DNS统计数据
- 增加.mobi域名后缀
下载地址：
http://fedns.isyi.com/download/index.shtml#2.1
使用手册：在线阅读或者下载阅读：
http://fedns.isyi.com/docs/index.shtml
17 五月, 2008 01:05
5月12日，下午2点28分，四川汶川发生大地震。
08 五月, 2008 19:22
总经理助理既联系上下，又协调左右，既是政务的参谋，又是事务的“主管”，是总办这一运 转中枢的“首脑”。总经理助理应认识到自己所处的地位和所应发挥的重要作用，爱岗敬业，尽职尽责地履行自己的职责，富有成效地做好总办工作。当好总经理助 理，主要应在以下8个方面努力：
一要认清自己，处事有原则。找不准位置，也就找不准工作的立足点、切入点、着力点，工作起来也就找不着“感觉”。总经理助理处于“总管家”与“不 管部长”的双重位置，围绕着中心工作，上协调领导，下联系群众，事务、政务都要过问，其他部门管不了、不该管的，都要总经理助理去管。总经理助理要把握所 应扮演的角色，把握好工作分寸，管理不巨细，参谋不决断，助手不揽权，不越权，不越位，不缺位，工作要到位。
二要耳聪目明，作好参谋工作。从大的方面说，当助手重要的在于搞好信息、决策、督查服务。及时地捕捉信息，准确地搞好反馈，积极地当好决策参谋。 不仅要善于发现问题，还要认真分析问题，给领导解决问题提供决策参考。领导一旦采纳决策意见，还要制订决策备选方案。备选方案不能只是一种，要有多种方 案，以便优中选优，“拍板定案”。决策制定后要采取得力措施抓落实，并及时搞好督促检查，搞好落实情况反馈。
三要善于长袖善舞，作好各部门之间的“润滑油”。首先要协调好上下的关系。对上：要尊重而不盲从，服务而不奴婢，更不能违背原则盲从领导。陈云同 志说，要“不唯书，不唯上，要唯实。”在实际工作中，不看领导眼色是不可能的，但要有分寸，要坚持原则，按章办事，不能惟命是从。待下：以礼，以诚，以 情。不要盛气凌人，不搞瞎指挥、乱指挥，不欺下瞒上。再是协调好内外关系，外求支持协作，内求团结向上。
四要高效快捷处理有关事务。总经理助理必须要有强烈的时效观念、意识，求真务实、雷厉风行的工作作风，运筹帷幄的领导艺术，在有限的时间里办好应 办之事。要善于“分身”，明确该干什么，不该干什么，先干什么，后干什么。要有所为，有所不为。为好应为之事。该别人“代劳”之事，要分解任务到人，并明 责授权，责权相等。一旦分工、明责、授权，要少插手，多支持下级大胆工作。不要事无巨细，事必躬亲。不该为之事，“亲自”未必就好，还往往会挫伤员工的积 极性。工作有成绩，也会有不足，要客观地分析是非功过，更不要跟下边抢功争好。尤其是出现过错不要推诿，对自己的过错更不要上推下卸。工作要扎实，力求实 绩、实效。总办工作不能摆花架子，更不能弄虚作假。要真实地反映情况，扎实地开展工作。
五要不断提升个人素质，增加人文魅力。自身素质强，就会产生人文 “魅力”和影响力。要当好总经理助理，要靠权力的影响力，但更重要的是靠非权力的影响力。只有二者有机结合，才能更好地开展工作。要注重发挥自身非权力因 素的影响力，靠德、识、才、学，靠高尚的人格、丰富的知识、高超的才干、卓有成效的方法艺术来开展工作。在提高自身素质的同时，还要学会尊重，学会理解， 学会“给予”，尊重上级，理解同级，善于“给予”下级。培养人才，帮助人展现才能，实现价值。
六要注意自身形象，起好表率作用。总办处在公司的第一线，一举一动都代表着公司形象。总经理助理务必要加强自身修养，注重自我形象塑造。同时，要 引导公司全体员工强化形象意识，形成塑造形象的共识。工作中，要重视外在形象的“包装”，全心全意地、热情细致地待人接物，为人处事。要经常并善于“换位 思考”，想一想假如自己是领导或是员工怎么办，设身处地地搞服务、办实事、办好事。
七要制订并完善游戏规则。一方面要根据工作需求，建立一套切实可行的工作规章制度，并不折不扣地去执行。另一方面要在工作实践中不断地加以完善。 比如，要建立值班制度、会务制度、文秘制度、以及廉政制度等，用制度管人、管事。根据游戏规则，奖优罚劣。表扬、奖励好的，批评、惩罚坏的。不能好坏不 分，是非不明，不能让“会叫唤的孩子多吃糖”，更不能形成或陷入“干的不如不干的，不干的不如捣蛋的”怪圈，建立并逐步完善好人能够积极办好事，坏人不敢 办坏事的良好机制，确保公司工作正常、有序、高效运转。
八要努力营造温馨快乐的工作环境。要着力创造总办工作的良好环境，用良好的环境去影响人、改造人、约束人。积极倡导、努力创造勤奋学习、积极向 上、努力开拓、团结协作、乐于奉献的良好环境，增强总办整体效能。总经理助理要把创造温馨快乐的工作环境视为重要的工作内容，思想上重视，工作上要研究、 策划，采取切实有效的举措，搞好宣传，形成舆论氛围。搞些健康有益的文娱活动，活跃员工的文化生活，努力创造一种用事业留人、用待遇留人、用情感留人的良 好工作环境。
回答者：kgdxk -
一要认清自己，处事有原则。找不准位置，也就找不准工作的立足点、切入点、着力点，工作起来也就找不着“感觉”。总经理助理处于“总管家”与“不 管部长”的双重位置，围绕着中心工作，上协调领导，下联系群众，事务、政务都要过问，其他部门管不了、不该管的，都要总经理助理去管。总经理助理要把握所 应扮演的角色，把握好工作分寸，管理不巨细，参谋不决断，助手不揽权，不越权，不越位，不缺位，工作要到位。
二要耳聪目明，作好参谋工作。从大的方面说，当助手重要的在于搞好信息、决策、督查服务。及时地捕捉信息，准确地搞好反馈，积极地当好决策参谋。 不仅要善于发现问题，还要认真分析问题，给领导解决问题提供决策参考。领导一旦采纳决策意见，还要制订决策备选方案。备选方案不能只是一种，要有多种方 案，以便优中选优，“拍板定案”。决策制定后要采取得力措施抓落实，并及时搞好督促检查，搞好落实情况反馈。
三要善于长袖善舞，作好各部门之间的“润滑油”。首先要协调好上下的关系。对上：要尊重而不盲从，服务而不奴婢，更不能违背原则盲从领导。陈云同 志说，要“不唯书，不唯上，要唯实。”在实际工作中，不看领导眼色是不可能的，但要有分寸，要坚持原则，按章办事，不能惟命是从。待下：以礼，以诚，以 情。不要盛气凌人，不搞瞎指挥、乱指挥，不欺下瞒上。再是协调好内外关系，外求支持协作，内求团结向上。
四要高效快捷处理有关事务。总经理助理必须要有强烈的时效观念、意识，求真务实、雷厉风行的工作作风，运筹帷幄的领导艺术，在有限的时间里办好应 办之事。要善于“分身”，明确该干什么，不该干什么，先干什么，后干什么。要有所为，有所不为。为好应为之事。该别人“代劳”之事，要分解任务到人，并明 责授权，责权相等。一旦分工、明责、授权，要少插手，多支持下级大胆工作。不要事无巨细，事必躬亲。不该为之事，“亲自”未必就好，还往往会挫伤员工的积 极性。工作有成绩，也会有不足，要客观地分析是非功过，更不要跟下边抢功争好。尤其是出现过错不要推诿，对自己的过错更不要上推下卸。工作要扎实，力求实 绩、实效。总办工作不能摆花架子，更不能弄虚作假。要真实地反映情况，扎实地开展工作。
五要不断提升个人素质，增加人文魅力。自身素质强，就会产生人文 “魅力”和影响力。要当好总经理助理，要靠权力的影响力，但更重要的是靠非权力的影响力。只有二者有机结合，才能更好地开展工作。要注重发挥自身非权力因 素的影响力，靠德、识、才、学，靠高尚的人格、丰富的知识、高超的才干、卓有成效的方法艺术来开展工作。在提高自身素质的同时，还要学会尊重，学会理解， 学会“给予”，尊重上级，理解同级，善于“给予”下级。培养人才，帮助人展现才能，实现价值。
六要注意自身形象，起好表率作用。总办处在公司的第一线，一举一动都代表着公司形象。总经理助理务必要加强自身修养，注重自我形象塑造。同时，要 引导公司全体员工强化形象意识，形成塑造形象的共识。工作中，要重视外在形象的“包装”，全心全意地、热情细致地待人接物，为人处事。要经常并善于“换位 思考”，想一想假如自己是领导或是员工怎么办，设身处地地搞服务、办实事、办好事。
七要制订并完善游戏规则。一方面要根据工作需求，建立一套切实可行的工作规章制度，并不折不扣地去执行。另一方面要在工作实践中不断地加以完善。 比如，要建立值班制度、会务制度、文秘制度、以及廉政制度等，用制度管人、管事。根据游戏规则，奖优罚劣。表扬、奖励好的，批评、惩罚坏的。不能好坏不 分，是非不明，不能让“会叫唤的孩子多吃糖”，更不能形成或陷入“干的不如不干的，不干的不如捣蛋的”怪圈，建立并逐步完善好人能够积极办好事，坏人不敢 办坏事的良好机制，确保公司工作正常、有序、高效运转。
八要努力营造温馨快乐的工作环境。要着力创造总办工作的良好环境，用良好的环境去影响人、改造人、约束人。积极倡导、努力创造勤奋学习、积极向 上、努力开拓、团结协作、乐于奉献的良好环境，增强总办整体效能。总经理助理要把创造温馨快乐的工作环境视为重要的工作内容，思想上重视，工作上要研究、 策划，采取切实有效的举措，搞好宣传，形成舆论氛围。搞些健康有益的文娱活动，活跃员工的文化生活，努力创造一种用事业留人、用待遇留人、用情感留人的良 好工作环境。
06 五月, 2008 18:33
在主任的带领下，本人在本月度/季度，基本完成了相关工作任务。今后，我将一如既往地按照主任的工作布署，在此工作基础上，本着“多沟通、多协调、积极主 动、创造性地开展工作”的指导思想，发扬慧康人“精诚团结，求真务实”的工作作风，全面开展工作。现制定工作计划如下： 一、人力资源： （一）建立人力资源规划工作机制。 1、协助主任调查和分析公司目前的人力资源配置情况，为招聘、加班、合理配置、定员定岗、管理层的人事决策等提供依据。 2、根据公司发展规划，提出与之相匹配的的人力资源规划。（此为工作设想，根据公司实际情况而定） （二）招聘与配置： 1、协助主任建立特殊人才（如售后工程师、研发人员、海外销售人员等）的储备机制及长期招聘渠道。 2、计划与国内重点高校建立优秀人才长期供应关系。 3、收集和关注国内知名招聘网站（如深圳人才网、Job88等）的人才信息。 4、在实际应用中完善已制订的《员工招聘操作规程》、流程及相关表单。 5、协助各部门实施招聘。 6、建立招聘档案。 （三）培训： 1、在实际应用中完善已制订的《员工培训教育管理办法》、流程及相关表单。 2、巩固已初步建立的员工培训机制。 3、制作一份新进员工培训教材。 4、建立培训档案。 5、邀请深圳市专业培训机构（如管理顾问公司）为公司部门主管或相关人员作1～2次培训。培训内容根据实际工作需要而定，如时间和目标管理、人力资源管理、工作任务分配、沟通协调、领导艺术等。 （四）绩效考核： 1、协助主任制定绩效考核管理办法，为绩效考核工作的具体实施提供依据。 2、协助主任在全公司推行新的绩效考核标准。 3、继续做好绩效考核的其他相关工作（如每月跟催、汇总等）。 （五）劳动关系管理 1、退休 （1）在实际应用中完善已制订的退休流程及相关表单。 （2）协助主任制订员工退休、资遣管理制度（正在制订），为办理退休、资遣事项提供依据。 2、辞职 （1）在实际应用中完善已制订的辞职流程及相关表单。 （2）协助主任制订辞职管理制度，为办理辞职事项提供依据。 （3）具体执行工作。 二、行政事务。 （一）车辆管理 协助主任开展相关工作。 （二）公章管理 1、协助主任做好相关审核工作。 2、制作公章管理登记薄。 （三）会议安排 协助主任安排会议议程及相关准备工作。 （四）公司大型活动的组织策划。 协助主任策划方案，并做好具体实施的相关工作。 （五）公司邮箱管理。 三点原则： 1、按时收取邮件； 2、妥当处理邮件； 3、慎重对待重要邮件。 （六）部门预算。 准确、详细登记每月发生的费用，按要求提交每月预算。 （七）宿舍管理 1、及时收取、交纳每月宿舍费用。 2、合理进行卫生安排，确保宿舍干净舒适。
三、对外事务： （一）证照的申办、年审。 协助主任进行资料准备及提交工作。 （二）政府扶持项目的申报。 协助主任开展相关工作。 （三）与政府部门、行业协会的日常沟通。 协助主任填制和递交相关报表、资料等。
四、其他临时交办事项。 四点原则： （一）主任交办事项，按重要紧急程度分别按要求办理。 （二）董事长、总经理交办事项，汇报主任后办理（或办理后知会主任）。 （三）其他同事交办事项，让其请示主任，征得同意后再办理。 （四）其他领导交办事项，本人请示主任，同意后再办理。
04 五月, 2008 06:04
新功能：
- 增加Whois功能，可以查询域名和IP注册信息
- 增加批量删除、修改域名、记录功能
- 增加域名、区域管理后确认功能，修改、删除域名、记录、区域后，需要应用确认才能生效
- 增加DNS日志错误关键字加亮功能
- 增加记录系统启动时间
修复BUG：
- 修复重复记录的BUG
升级：
- 基础系统升级到FreeBSD6.3
- BIND，升级到bind-9.4.2
其他：
- 更换WEB界面模板，更漂亮、更易用
- 细化DNS统计数据
- 增加.mobi域名后缀
01 五月, 2008 18:08
EM64T本质上和AMD64一样都是IA-32的增强版本，Xeon借助于EM64T可实现高达1TB（40bit）的物理内存寻址和256TB （48bit）的虚拟内存寻址，并且良好地支持现有32位x86代码的执行，这一点跟AMD64无异，同时也是Intel开发EM64T的出发点—让现有的x86指令集能够执行64位代码，而继续保持对32位代码的良好兼容。但由于多方面的限制，无论是EM64T还是AMD64均只能实现比32位指令集更大内存空间的寻址，而无法真正做到纯64位指令集的1PB（50bit）和16EB（64bit）的物理内存和虚拟内存寻址（IA-64就能做到这一点），其关键在于EM64T和AMD64本质上仍是基于32位的x86指令集，只是Intel和AMD分别采用不同的技术手段对x86指令集进行扩展，从而实现对64位的支持
和AMD64一样，EM64T由于要在同时运行32位和64位程序，因此会针对不同的需要运行于不同的操作模式，同时其引入的多种操作模式之间的切换较为成功地解决了32位程序在64位操作系统下的运行效率问题，当中包括了传统模式、兼容模式和纯64位模式。
-----传统模式（Legacy Mode）-----
这种模式是为了令64位Xeon能没有障碍地执行现有的32位和16位程序而设计的，实际上就是32位x86时代的IA-32模式，此时现有 x86程序无需作任何的改变，和我们目前使用着的32位环境一模一样。因为Nacona Xeon的核心仍然是沿着32位设计的，所以这个模式只是把所有为64位计算而新增的运算机制都屏蔽起来。
-----兼容模式（Compatibility Mode）-----
兼容模式允许64位操作系统（如Windows XP x64 Edition）良好地运行基于32位和16位代码的程序，此时32位程序无需重编译即可以保护模式运行，而16位程序则要依赖于操作系统和驱动程序是否支持保护模式，情况类似于32位环境下的IA-32虚拟实模式。和传统模式相同，兼容模式允许程序利用物理内存扩展实现64GB的物理内存寻址，但这并非纯64位模式的准64位寻址。
-----纯64位模式（Full 64bit Mode）-----
此模式是三种模式当中最为高效的，同时可充分发挥EM64T的威力，但这种模式需要纯64位环境的支持，包括64位操作系统和64位应用程序。在64位操作系统和相应驱动程序的支持下，系统和应用程序能够访问EM64T所支持最大容量的扩展内存，这时Xeon平台的性能可得到最充分的发挥，当然运行于此模式下的程序需要修改其微代码以便支持64位指令操作。
可以预见，在未来相当长的一段时间里，在64位操作系统下我们最常用的是兼容模式，因为现存的大量32位应用程序不可能在短期内为x86-64指令集而重新开发，为了保证现有的32位程序能够继续在Xeon平台上顺利执行，EM64T提供了一种出色的解决方案。而对于传统的32位操作系统和应用程序， Xeon平台当然可以百分百地相容运行，本来EM64T就是扩展的32位x86指令集，兼容32位程序是件很自然的事。
EM64T在64位的实现方式上跟AMD64指令集有很多相似之处，但在关键的地方两者还是有很大差别，而Intel追加的大多数64位指令与AMD64 指令集相兼容，因此Microsoft就不用为两家公司的64位处理器开发各自的64位操作系统。目前Microsoft推出的Windows XP x64 Edition操作系统（Beta）可同时支持EM64T和AMD64，能够兼容几乎所有的32位应用程序和大部分新增64位应用程序。
浅谈 EM64T技术和AMD64区别
X86-64 （AMD64 / EM64T）
AMD公司设计，可以在同一时间内处理64位的整数运算，并兼容于X86-32架构。其中支持64位逻辑定址，同时提供转换为32位定址选项；但数据操作指令默认为32位和8位，提供转换成64位和16位的选项；支持常规用途寄存器，如果是32位运算操作，就要将结果扩展成完整的64位。这样，指令中有 “直接执行”和“转换执行”的区别，其指令字段是8位或32位，可以避免字段过长。
x86-64（AMD64）的产生也并非空穴来风，x86处理器的32bit寻址空间限制在4GB内存，而IA-64的处理器又不能兼容x86。AMD充分考虑顾客的需求，加强x86指令集的功能，使这套指令集可同时支持64位的运算模式，因此AMD把它们的结构称之为x86-64。在技术上AMD在 x86-64架构中为了进行64位运算，AMD为其引入了新增了R8-R15通用寄存器作为原有X86处理器寄存器的扩充，但在而在32位环境下并不完全使用到这些寄存器。原来的寄存器诸如EAX、EBX也由32位扩张至64位。在SSE单元中新加入了8个新寄存器以提供对SSE2的支持。寄存器数量的增加将带来性能的提升。与此同时，为了同时支持32和64位代码及寄存器，x86-64架构允许处理器工作在以下两种模式：Long Mode(长模式)和Legacy Mode(遗传模式)，Long模式又分为两种子模式(64bit模式和Compatibility mode兼容模式)。该标准已经被引进在AMD服务器处理器中的Opteron处理器。
而今年也推出了支持64位的EM64T技术，再还没被正式命为EM64T之前是IA32E，这是英特尔64位扩展技术的名字,用来区别X86指令集。 Intel的EM64T支持64位sub-mode，和AMD的X86-64技术类似，采用64位的线性平面寻址，加入8个新的通用寄存器（GPRs），还增加8个寄存器支持SSE指令。与AMD相类似，Intel的64位技术将兼容IA32和IA32E，只有在运行64位操作系统下的时候，才将会采用 IA32E。IA32E将由2个sub-mode组成：64位sub-mode和32位sub-mode，同AMD64一样是向下兼容的。Intel的 EM64T将完全兼容AMD的X86-64技术。现在Nocona处理器已经加入了一些64位技术，Intel的Pentium 4E处理器也支持64位技术。
应该说，这两者都是兼容x86指令集的64位微处理器架构，但EM64T与AMD64还是有一些不一样的地方，AMD64处理器中的NX位在Intel的处理器中将没有提供。
一个小孩说：
AMD 的AM2 X2就是用AM2接口的双核处理器；AMD X2就是以939为接口的双核处理器，AMD的AM2 CPU是AM2接口的单核处理器
Core（酷睿）微体系架构，其针对桌面、笔记本和服务器推出的产品代号分别是，Conroe、Merom和Woodcrest，都拥有64位处理能力，并且是双核产品。
(Conroe扣肉
Merom猫肉
Woodcrest服务器上用的)
和AMD64一样，EM64T由于要在同时运行32位和64位程序，因此会针对不同的需要运行于不同的操作模式，同时其引入的多种操作模式之间的切换较为成功地解决了32位程序在64位操作系统下的运行效率问题，当中包括了传统模式、兼容模式和纯64位模式。
-----传统模式（Legacy Mode）-----
这种模式是为了令64位Xeon能没有障碍地执行现有的32位和16位程序而设计的，实际上就是32位x86时代的IA-32模式，此时现有 x86程序无需作任何的改变，和我们目前使用着的32位环境一模一样。因为Nacona Xeon的核心仍然是沿着32位设计的，所以这个模式只是把所有为64位计算而新增的运算机制都屏蔽起来。
-----兼容模式（Compatibility Mode）-----
兼容模式允许64位操作系统（如Windows XP x64 Edition）良好地运行基于32位和16位代码的程序，此时32位程序无需重编译即可以保护模式运行，而16位程序则要依赖于操作系统和驱动程序是否支持保护模式，情况类似于32位环境下的IA-32虚拟实模式。和传统模式相同，兼容模式允许程序利用物理内存扩展实现64GB的物理内存寻址，但这并非纯64位模式的准64位寻址。
-----纯64位模式（Full 64bit Mode）-----
此模式是三种模式当中最为高效的，同时可充分发挥EM64T的威力，但这种模式需要纯64位环境的支持，包括64位操作系统和64位应用程序。在64位操作系统和相应驱动程序的支持下，系统和应用程序能够访问EM64T所支持最大容量的扩展内存，这时Xeon平台的性能可得到最充分的发挥，当然运行于此模式下的程序需要修改其微代码以便支持64位指令操作。
可以预见，在未来相当长的一段时间里，在64位操作系统下我们最常用的是兼容模式，因为现存的大量32位应用程序不可能在短期内为x86-64指令集而重新开发，为了保证现有的32位程序能够继续在Xeon平台上顺利执行，EM64T提供了一种出色的解决方案。而对于传统的32位操作系统和应用程序， Xeon平台当然可以百分百地相容运行，本来EM64T就是扩展的32位x86指令集，兼容32位程序是件很自然的事。
EM64T在64位的实现方式上跟AMD64指令集有很多相似之处，但在关键的地方两者还是有很大差别，而Intel追加的大多数64位指令与AMD64 指令集相兼容，因此Microsoft就不用为两家公司的64位处理器开发各自的64位操作系统。目前Microsoft推出的Windows XP x64 Edition操作系统（Beta）可同时支持EM64T和AMD64，能够兼容几乎所有的32位应用程序和大部分新增64位应用程序。
浅谈 EM64T技术和AMD64区别
X86-64 （AMD64 / EM64T）
AMD公司设计，可以在同一时间内处理64位的整数运算，并兼容于X86-32架构。其中支持64位逻辑定址，同时提供转换为32位定址选项；但数据操作指令默认为32位和8位，提供转换成64位和16位的选项；支持常规用途寄存器，如果是32位运算操作，就要将结果扩展成完整的64位。这样，指令中有 “直接执行”和“转换执行”的区别，其指令字段是8位或32位，可以避免字段过长。
x86-64（AMD64）的产生也并非空穴来风，x86处理器的32bit寻址空间限制在4GB内存，而IA-64的处理器又不能兼容x86。AMD充分考虑顾客的需求，加强x86指令集的功能，使这套指令集可同时支持64位的运算模式，因此AMD把它们的结构称之为x86-64。在技术上AMD在 x86-64架构中为了进行64位运算，AMD为其引入了新增了R8-R15通用寄存器作为原有X86处理器寄存器的扩充，但在而在32位环境下并不完全使用到这些寄存器。原来的寄存器诸如EAX、EBX也由32位扩张至64位。在SSE单元中新加入了8个新寄存器以提供对SSE2的支持。寄存器数量的增加将带来性能的提升。与此同时，为了同时支持32和64位代码及寄存器，x86-64架构允许处理器工作在以下两种模式：Long Mode(长模式)和Legacy Mode(遗传模式)，Long模式又分为两种子模式(64bit模式和Compatibility mode兼容模式)。该标准已经被引进在AMD服务器处理器中的Opteron处理器。
而今年也推出了支持64位的EM64T技术，再还没被正式命为EM64T之前是IA32E，这是英特尔64位扩展技术的名字,用来区别X86指令集。 Intel的EM64T支持64位sub-mode，和AMD的X86-64技术类似，采用64位的线性平面寻址，加入8个新的通用寄存器（GPRs），还增加8个寄存器支持SSE指令。与AMD相类似，Intel的64位技术将兼容IA32和IA32E，只有在运行64位操作系统下的时候，才将会采用 IA32E。IA32E将由2个sub-mode组成：64位sub-mode和32位sub-mode，同AMD64一样是向下兼容的。Intel的 EM64T将完全兼容AMD的X86-64技术。现在Nocona处理器已经加入了一些64位技术，Intel的Pentium 4E处理器也支持64位技术。
应该说，这两者都是兼容x86指令集的64位微处理器架构，但EM64T与AMD64还是有一些不一样的地方，AMD64处理器中的NX位在Intel的处理器中将没有提供。
一个小孩说：
AMD 的AM2 X2就是用AM2接口的双核处理器；AMD X2就是以939为接口的双核处理器，AMD的AM2 CPU是AM2接口的单核处理器
Core（酷睿）微体系架构，其针对桌面、笔记本和服务器推出的产品代号分别是，Conroe、Merom和Woodcrest，都拥有64位处理能力，并且是双核产品。
(Conroe扣肉
Merom猫肉
Woodcrest服务器上用的)
01 五月, 2008 18:06
These `-m' options are defined for the i386 and x86-64 family of computers:
-mtune=cpu-type
Tune to cpu-type everything applicable about the generated code, except for the ABI and the set of available instructions. The choices for cpu-type are:
generic
Produce code optimized for the most common IA32/AMD64/EM64T processors. If you know the CPU on which your code will run, then you should use the corresponding -mtune option instead of -mtune=generic. But, if you do not know exactly what CPU users of your application will have, then you should use this option.
As new processors are deployed in the marketplace, the behavior of this option will change. Therefore, if you upgrade to a newer version of GCC, the code generated option will change to reflect the processors that were most common when that version of GCC was released.
There is no -march=generic option because -march indicates the instruction set the compiler can use, and there is no generic instruction set applicable to all processors. In contrast, -mtune indicates the processor (or, in this case, collection of processors) for which the code is optimized.
native
This selects the CPU to tune for at compilation time by determining the processor type of the compiling machine. Using -mtune=native will produce code optimized for the local machine under the constraints of the selected instruction set. Using -march=native will enable all instruction subsets supported by the local machine (hence the result might not run on different machines).
i386
Original Intel's i386 CPU.
i486
Intel's i486 CPU. (No scheduling is implemented for this chip.)
i586, pentium
Intel Pentium CPU with no MMX support.
pentium-mmx
Intel PentiumMMX CPU based on Pentium core with MMX instruction set support.
pentiumpro
Intel PentiumPro CPU.
i686
Same as generic, but when used as march option, PentiumPro instruction set will be used, so the code will run on all i686 family chips.
pentium2
Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
pentium3, pentium3m
Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction set support.
pentium-m
Low power version of Intel Pentium3 CPU with MMX, SSE and SSE2 instruction set support. Used by Centrino notebooks.
pentium4, pentium4m
Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support.
prescott
Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction set support.
nocona
Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE, SSE2 and SSE3 instruction set support.
core2
Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.
k6
AMD K6 CPU with MMX instruction set support.
k6-2, k6-3
Improved versions of AMD K6 CPU with MMX and 3dNOW! instruction set support.
athlon, athlon-tbird
AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and SSE prefetch instructions support.
athlon-4, athlon-xp, athlon-mp
Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE instruction set support.
k8, opteron, athlon64, athlon-fx
AMD K8 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
k8-sse3, opteron-sse3, athlon64-sse3
Improved versions of k8, opteron and athlon64 with SSE3 instruction set support.
amdfam10, barcelona
AMD Family 10h core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSE4A, 3dNOW!, enhanced 3dNOW!, ABM and 64-bit instruction set extensions.)
winchip-c6
IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction set support.
winchip2
IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3dNOW! instruction set support.
c3
Via C3 CPU with MMX and 3dNOW! instruction set support. (No scheduling is implemented for this chip.)
c3-2
Via C3-2 CPU with MMX and SSE instruction set support. (No scheduling is implemented for this chip.)
geode
Embedded AMD CPU with MMX and 3dNOW! instruction set support.
While picking a specific cpu-type will schedule things appropriately for that particular chip, the compiler will not generate any code that does not run on the i386 without the -march=cpu-type option being used.
-march=cpu-type
Generate instructions for the machine type cpu-type. The choices for cpu-type are the same as for -mtune. Moreover, specifying -march=cpu-type implies -mtune=cpu-type.
-mcpu=cpu-type
A deprecated synonym for -mtune.
-mfpmath=unit
Generate floating point arithmetics for selected unit unit. The choices for unit are:
`387'
Use the standard 387 floating point coprocessor present majority of chips and emulated otherwise. Code compiled with this option will run almost everywhere. The temporary results are computed in 80bit precision instead of precision specified by the type resulting in slightly different results compared to most of other chips. See -ffloat-store for more detailed description.
This is the default choice for i386 compiler.
`sse'
Use scalar floating point instructions present in the SSE instruction set. This instruction set is supported by Pentium3 and newer chips, in the AMD line by Athlon-4, Athlon-xp and Athlon-mp chips. The earlier version of SSE instruction set supports only single precision arithmetics, thus the double and extended precision arithmetics is still done using 387. Later version, present only in Pentium4 and the future AMD x86-64 chips supports double precision arithmetics too.
For the i386 compiler, you need to use -march=cpu-type, -msse or -msse2 switches to enable SSE extensions and make this option effective. For the x86-64 compiler, these extensions are enabled by default.
The resulting code should be considerably faster in the majority of cases and avoid the numerical instability problems of 387 code, but may break some existing code that expects temporaries to be 80bit.
This is the default choice for the x86-64 compiler.
`sse,387'
Attempt to utilize both instruction sets at once. This effectively double the amount of available registers and on chips with separate execution units for 387 and SSE the execution resources too. Use this option with care, as it is still experimental, because the GCC register allocator does not model separate functional units well resulting in instable performance.
-masm=dialect
Output asm instructions using selected dialect. Supported choices are `intel' or `att' (the default one). Darwin does not support `intel'.
-mieee-fp
-mno-ieee-fp
Control whether or not the compiler uses IEEE floating point comparisons. These handle correctly the case where the result of a comparison is unordered.
-msoft-float
Generate output containing library calls for floating point. Warning: the requisite libraries are not part of GCC. Normally the facilities of the machine's usual C compiler are used, but this can't be done directly in cross-compilation. You must make your own arrangements to provide suitable library functions for cross-compilation.
On machines where a function returns floating point results in the 80387 register stack, some floating point opcodes may be emitted even if -msoft-float is used.
-mno-fp-ret-in-387
Do not use the FPU registers for return values of functions.
The usual calling convention has functions return values of types float and double in an FPU register, even if there is no FPU. The idea is that the operating system should emulate an FPU.
The option -mno-fp-ret-in-387 causes such values to be returned in ordinary CPU registers instead.
-mno-fancy-math-387
Some 387 emulators do not support the sin, cos and sqrt instructions for the 387. Specify this option to avoid generating those instructions. This option is the default on FreeBSD, OpenBSD and NetBSD. This option is overridden when -march indicates that the target cpu will always have an FPU and so the instruction will not need emulation. As of revision 2.6.1, these instructions are not generated unless you also use the -funsafe-math-optimizations switch.
-malign-double
-mno-align-double
Control whether GCC aligns double, long double, and long long variables on a two word boundary or a one word boundary. Aligning double variables on a two word boundary will produce code that runs somewhat faster on a `Pentium' at the expense of more memory.
On x86-64, -malign-double is enabled by default.
Warning: if you use the -malign-double switch, structures containing the above types will be aligned differently than the published application binary interface specifications for the 386 and will not be binary compatible with structures in code compiled without that switch.
-m96bit-long-double
-m128bit-long-double
These switches control the size of long double type. The i386 application binary interface specifies the size to be 96 bits, so -m96bit-long-double is the default in 32 bit mode.
Modern architectures (Pentium and newer) would prefer long double to be aligned to an 8 or 16 byte boundary. In arrays or structures conforming to the ABI, this would not be possible. So specifying a -m128bit-long-double will align long double to a 16 byte boundary by padding the long double with an additional 32 bit zero.
In the x86-64 compiler, -m128bit-long-double is the default choice as its ABI specifies that long double is to be aligned on 16 byte boundary.
Notice that neither of these options enable any extra precision over the x87 standard of 80 bits for a long double.
Warning: if you override the default value for your target ABI, the structures and arrays containing long double variables will change their size as well as function calling convention for function taking long double will be modified. Hence they will not be binary compatible with arrays or structures in code compiled without that switch.
-mmlarge-data-threshold=number
When -mcmodel=medium is specified, the data greater than threshold are placed in large data section. This value must be the same across all object linked into the binary and defaults to 65535.
-mrtd
Use a different function-calling convention, in which functions that take a fixed number of arguments return with the ret num instruction, which pops their arguments while returning. This saves one instruction in the caller since there is no need to pop the arguments there.
You can specify that an individual function is called with this calling sequence with the function attribute `stdcall'. You can also override the -mrtd option by using the function attribute `cdecl'. See Function Attributes.
Warning: this calling convention is incompatible with the one normally used on Unix, so you cannot use it if you need to call libraries compiled with the Unix compiler.
Also, you must provide function prototypes for all functions that take variable numbers of arguments (including printf); otherwise incorrect code will be generated for calls to those functions.
In addition, seriously incorrect code will result if you call a function with too many arguments. (Normally, extra arguments are harmlessly ignored.)
-mregparm=num
Control how many registers are used to pass integer arguments. By default, no registers are used to pass arguments, and at most 3 registers can be used. You can control this behavior for a specific function by using the function attribute `regparm'. See Function Attributes.
Warning: if you use this switch, and num is nonzero, then you must build all modules with the same value, including any libraries. This includes the system libraries and startup modules.
-msseregparm
Use SSE register passing conventions for float and double arguments and return values. You can control this behavior for a specific function by using the function attribute `sseregparm'. See Function Attributes.
Warning: if you use this switch then you must build all modules with the same value, including any libraries. This includes the system libraries and startup modules.
-mpc32
-mpc64
-mpc80
Set 80387 floating-point precision to 32, 64 or 80 bits. When -mpc32 is specified, the significands of results of floating-point operations are rounded to 24 bits (single precision); -mpc64 rounds the the significands of results of floating-point operations to 53 bits (double precision) and -mpc80 rounds the significands of results of floating-point operations to 64 bits (extended double precision), which is the default. When this option is used, floating-point operations in higher precisions are not available to the programmer without setting the FPU control word explicitly.
Setting the rounding of floating-point operations to less than the default 80 bits can speed some programs by 2% or more. Note that some mathematical libraries assume that extended precision (80 bit) floating-point operations are enabled by default; routines in such libraries could suffer significant loss of accuracy, typically through so-called "catastrophic cancellation", when this option is used to set the precision to less than extended precision.
-mstackrealign
Realign the stack at entry. On the Intel x86, the -mstackrealign option will generate an alternate prologue and epilogue that realigns the runtime stack. This supports mixing legacy codes that keep a 4-byte aligned stack with modern codes that keep a 16-byte stack for SSE compatibility. The alternate prologue and epilogue are slower and bigger than the regular ones, and the alternate prologue requires an extra scratch register; this lowers the number of registers available if used in conjunction with the regparm attribute. The -mstackrealign option is incompatible with the nested function prologue; this is considered a hard error. See also the attribute force_align_arg_pointer, applicable to individual functions.
-mpreferred-stack-boundary=num
Attempt to keep the stack boundary aligned to a 2 raised to num byte boundary. If -mpreferred-stack-boundary is not specified, the default is 4 (16 bytes or 128 bits).
On Pentium and PentiumPro, double and long double values should be aligned to an 8 byte boundary (see -malign-double) or suffer significant run time performance penalties. On Pentium III, the Streaming SIMD Extension (SSE) data type __m128 may not work properly if it is not 16 byte aligned.
To ensure proper alignment of this values on the stack, the stack boundary must be as aligned as that required by any value stored on the stack. Further, every function must be generated such that it keeps the stack aligned. Thus calling a function compiled with a higher preferred stack boundary from a function compiled with a lower preferred stack boundary will most likely misalign the stack. It is recommended that libraries that use callbacks always use the default setting.
This extra alignment does consume extra stack space, and generally increases code size. Code that is sensitive to stack space usage, such as embedded systems and operating system kernels, may want to reduce the preferred alignment to -mpreferred-stack-boundary=2.
-mmmx
-mno-mmx
-msse
-mno-sse
-msse2
-mno-sse2
-msse3
-mno-sse3
-mssse3
-mno-ssse3
-msse4.1
-mno-sse4.1
-msse4.2
-mno-sse4.2
-msse4
-mno-sse4
-msse4a
-mno-sse4a
-msse5
-mno-sse5
-m3dnow
-mno-3dnow
-mpopcnt
-mno-popcnt
-mabm
-mno-abm
These switches enable or disable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4A, SSE5, ABM or 3DNow! extended instruction sets. These extensions are also available as built-in functions: see X86 Built-in Functions, for details of the functions enabled and disabled by these switches.
To have SSE/SSE2 instructions generated automatically from floating-point code (as opposed to 387 instructions), see -mfpmath=sse.
These options will enable GCC to use these extended instructions in generated code, even without -mfpmath=sse. Applications which perform runtime CPU detection must compile separate files for each supported architecture, using the appropriate flags. In particular, the file containing the CPU detection code should be compiled without these options.
-mcx16
This option will enable GCC to use CMPXCHG16B instruction in generated code. CMPXCHG16B allows for atomic operations on 128-bit double quadword (or oword) data types. This is useful for high resolution counters that could be updated by multiple processors (or cores). This instruction is generated as part of atomic built-in functions: see Atomic Builtins for details.
-msahf
This option will enable GCC to use SAHF instruction in generated 64-bit code. Early Intel CPUs with Intel 64 lacked LAHF and SAHF instructions supported by AMD64 until introduction of Pentium 4 G1 step in December 2005. LAHF and SAHF are load and store instructions, respectively, for certain status flags. In 64-bit mode, SAHF instruction is used to optimize fmod, drem or remainder built-in functions: see Other Builtins for details.
-mrecip
This option will enable GCC to use RCPSS and RSQRTSS instructions (and their vectorized variants RCPPS and RSQRTPS) instead of DIVSS and SQRTSS (and their vectorized variants). These instructions will be generated only when -funsafe-math-optimizations is enabled.
-mveclibabi=type
Specifies the ABI type to use for vectorizing intrinsics using an external library. Supported types are acml for the AMD math core library style of interfacing. GCC will currently emit calls to __vrd2_sin, __vrd2_cos, __vrd2_exp, __vrd2_log, __vrd2_log2, __vrd2_log10, __vrs4_sinf, __vrs4_cosf, __vrs4_expf, __vrs4_logf, __vrs4_log2f, __vrs4_log10f and __vrs4_powf when using this type and -ftree-vectorize is enabled. A ACML ABI compatible library will have to be specified at link time.
-mpush-args
-mno-push-args
Use PUSH operations to store outgoing parameters. This method is shorter and usually equally fast as method using SUB/MOV operations and is enabled by default. In some cases disabling it may improve performance because of improved scheduling and reduced dependencies.
-maccumulate-outgoing-args
If enabled, the maximum amount of space required for outgoing arguments will be computed in the function prologue. This is faster on most modern CPUs because of reduced dependencies, improved scheduling and reduced stack usage when preferred stack boundary is not equal to 2. The drawback is a notable increase in code size. This switch implies -mno-push-args.
-mthreads
Support thread-safe exception handling on `Mingw32'. Code that relies on thread-safe exception handling must compile and link all code with the -mthreads option. When compiling, -mthreads defines -D_MT; when linking, it links in a special thread helper library -lmingwthrd which cleans up per thread exception handling data.
-mno-align-stringops
Do not align destination of inlined string operations. This switch reduces code size and improves performance in case the destination is already aligned, but GCC doesn't know about it.
-minline-all-stringops
By default GCC inlines string operations only when destination is known to be aligned at least to 4 byte boundary. This enables more inlining, increase code size, but may improve performance of code that depends on fast memcpy, strlen and memset for short lengths.
-minline-stringops-dynamically
For string operation of unknown size, inline runtime checks so for small blocks inline code is used, while for large blocks library call is used.
-mstringop-strategy=alg
Overwrite internal decision heuristic about particular algorithm to inline string operation with. The allowed values are rep_byte, rep_4byte, rep_8byte for expanding using i386 rep prefix of specified size, byte_loop, loop, unrolled_loop for expanding inline loop, libcall for always expanding library call.
-momit-leaf-frame-pointer
Don't keep the frame pointer in a register for leaf functions. This avoids the instructions to save, set up and restore frame pointers and makes an extra register available in leaf functions. The option -fomit-frame-pointer removes the frame pointer for all functions which might make debugging harder.
-mtls-direct-seg-refs
-mno-tls-direct-seg-refs
Controls whether TLS variables may be accessed with offsets from the TLS segment register (%gs for 32-bit, %fs for 64-bit), or whether the thread base pointer must be added. Whether or not this is legal depends on the operating system, and whether it maps the segment to cover the entire TLS area.
For systems that use GNU libc, the default is on.
-mfused-madd
-mno-fused-madd
Enable automatic generation of fused floating point multiply-add instructions if the ISA supports such instructions. The -mfused-madd option is on by default. The fused multiply-add instructions have a different rounding behavior compared to executing a multiply followed by an add.
These `-m' switches are supported in addition to the above on AMD x86-64 processors in 64-bit environments.
-m32
-m64
Generate code for a 32-bit or 64-bit environment. The 32-bit environment sets int, long and pointer to 32 bits and generates code that runs on any i386 system. The 64-bit environment sets int to 32 bits and long and pointer to 64 bits and generates code for AMD's x86-64 architecture. For darwin only the -m64 option turns off the -fno-pic and -mdynamic-no-pic options.
-mno-red-zone
Do not use a so called red zone for x86-64 code. The red zone is mandated by the x86-64 ABI, it is a 128-byte area beyond the location of the stack pointer that will not be modified by signal or interrupt handlers and therefore can be used for temporary data without adjusting the stack pointer. The flag -mno-red-zone disables this red zone.
-mcmodel=small
Generate code for the small code model: the program and its symbols must be linked in the lower 2 GB of the address space. Pointers are 64 bits. Programs can be statically or dynamically linked. This is the default code model.
-mcmodel=kernel
Generate code for the kernel code model. The kernel runs in the negative 2 GB of the address space. This model has to be used for Linux kernel code.
-mcmodel=medium
Generate code for the medium model: The program is linked in the lower 2 GB of the address space but symbols can be located anywhere in the address space. Programs can be statically or dynamically linked, but building of shared libraries are not supported with the medium model.
-mcmodel=large
Generate code for the large model: This model makes no assumptions about addresses and sizes of sections.
-mtune=cpu-type
Tune to cpu-type everything applicable about the generated code, except for the ABI and the set of available instructions. The choices for cpu-type are:
generic
Produce code optimized for the most common IA32/AMD64/EM64T processors. If you know the CPU on which your code will run, then you should use the corresponding -mtune option instead of -mtune=generic. But, if you do not know exactly what CPU users of your application will have, then you should use this option.
As new processors are deployed in the marketplace, the behavior of this option will change. Therefore, if you upgrade to a newer version of GCC, the code generated option will change to reflect the processors that were most common when that version of GCC was released.
There is no -march=generic option because -march indicates the instruction set the compiler can use, and there is no generic instruction set applicable to all processors. In contrast, -mtune indicates the processor (or, in this case, collection of processors) for which the code is optimized.
native
This selects the CPU to tune for at compilation time by determining the processor type of the compiling machine. Using -mtune=native will produce code optimized for the local machine under the constraints of the selected instruction set. Using -march=native will enable all instruction subsets supported by the local machine (hence the result might not run on different machines).
i386
Original Intel's i386 CPU.
i486
Intel's i486 CPU. (No scheduling is implemented for this chip.)
i586, pentium
Intel Pentium CPU with no MMX support.
pentium-mmx
Intel PentiumMMX CPU based on Pentium core with MMX instruction set support.
pentiumpro
Intel PentiumPro CPU.
i686
Same as generic, but when used as march option, PentiumPro instruction set will be used, so the code will run on all i686 family chips.
pentium2
Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
pentium3, pentium3m
Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction set support.
pentium-m
Low power version of Intel Pentium3 CPU with MMX, SSE and SSE2 instruction set support. Used by Centrino notebooks.
pentium4, pentium4m
Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support.
prescott
Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction set support.
nocona
Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE, SSE2 and SSE3 instruction set support.
core2
Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.
k6
AMD K6 CPU with MMX instruction set support.
k6-2, k6-3
Improved versions of AMD K6 CPU with MMX and 3dNOW! instruction set support.
athlon, athlon-tbird
AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and SSE prefetch instructions support.
athlon-4, athlon-xp, athlon-mp
Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE instruction set support.
k8, opteron, athlon64, athlon-fx
AMD K8 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
k8-sse3, opteron-sse3, athlon64-sse3
Improved versions of k8, opteron and athlon64 with SSE3 instruction set support.
amdfam10, barcelona
AMD Family 10h core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSE4A, 3dNOW!, enhanced 3dNOW!, ABM and 64-bit instruction set extensions.)
winchip-c6
IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction set support.
winchip2
IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3dNOW! instruction set support.
c3
Via C3 CPU with MMX and 3dNOW! instruction set support. (No scheduling is implemented for this chip.)
c3-2
Via C3-2 CPU with MMX and SSE instruction set support. (No scheduling is implemented for this chip.)
geode
Embedded AMD CPU with MMX and 3dNOW! instruction set support.
While picking a specific cpu-type will schedule things appropriately for that particular chip, the compiler will not generate any code that does not run on the i386 without the -march=cpu-type option being used.
-march=cpu-type
Generate instructions for the machine type cpu-type. The choices for cpu-type are the same as for -mtune. Moreover, specifying -march=cpu-type implies -mtune=cpu-type.
-mcpu=cpu-type
A deprecated synonym for -mtune.
-mfpmath=unit
Generate floating point arithmetics for selected unit unit. The choices for unit are:
`387'
Use the standard 387 floating point coprocessor present majority of chips and emulated otherwise. Code compiled with this option will run almost everywhere. The temporary results are computed in 80bit precision instead of precision specified by the type resulting in slightly different results compared to most of other chips. See -ffloat-store for more detailed description.
This is the default choice for i386 compiler.
`sse'
Use scalar floating point instructions present in the SSE instruction set. This instruction set is supported by Pentium3 and newer chips, in the AMD line by Athlon-4, Athlon-xp and Athlon-mp chips. The earlier version of SSE instruction set supports only single precision arithmetics, thus the double and extended precision arithmetics is still done using 387. Later version, present only in Pentium4 and the future AMD x86-64 chips supports double precision arithmetics too.
For the i386 compiler, you need to use -march=cpu-type, -msse or -msse2 switches to enable SSE extensions and make this option effective. For the x86-64 compiler, these extensions are enabled by default.
The resulting code should be considerably faster in the majority of cases and avoid the numerical instability problems of 387 code, but may break some existing code that expects temporaries to be 80bit.
This is the default choice for the x86-64 compiler.
`sse,387'
Attempt to utilize both instruction sets at once. This effectively double the amount of available registers and on chips with separate execution units for 387 and SSE the execution resources too. Use this option with care, as it is still experimental, because the GCC register allocator does not model separate functional units well resulting in instable performance.
-masm=dialect
Output asm instructions using selected dialect. Supported choices are `intel' or `att' (the default one). Darwin does not support `intel'.
-mieee-fp
-mno-ieee-fp
Control whether or not the compiler uses IEEE floating point comparisons. These handle correctly the case where the result of a comparison is unordered.
-msoft-float
Generate output containing library calls for floating point. Warning: the requisite libraries are not part of GCC. Normally the facilities of the machine's usual C compiler are used, but this can't be done directly in cross-compilation. You must make your own arrangements to provide suitable library functions for cross-compilation.
On machines where a function returns floating point results in the 80387 register stack, some floating point opcodes may be emitted even if -msoft-float is used.
-mno-fp-ret-in-387
Do not use the FPU registers for return values of functions.
The usual calling convention has functions return values of types float and double in an FPU register, even if there is no FPU. The idea is that the operating system should emulate an FPU.
The option -mno-fp-ret-in-387 causes such values to be returned in ordinary CPU registers instead.
-mno-fancy-math-387
Some 387 emulators do not support the sin, cos and sqrt instructions for the 387. Specify this option to avoid generating those instructions. This option is the default on FreeBSD, OpenBSD and NetBSD. This option is overridden when -march indicates that the target cpu will always have an FPU and so the instruction will not need emulation. As of revision 2.6.1, these instructions are not generated unless you also use the -funsafe-math-optimizations switch.
-malign-double
-mno-align-double
Control whether GCC aligns double, long double, and long long variables on a two word boundary or a one word boundary. Aligning double variables on a two word boundary will produce code that runs somewhat faster on a `Pentium' at the expense of more memory.
On x86-64, -malign-double is enabled by default.
Warning: if you use the -malign-double switch, structures containing the above types will be aligned differently than the published application binary interface specifications for the 386 and will not be binary compatible with structures in code compiled without that switch.
-m96bit-long-double
-m128bit-long-double
These switches control the size of long double type. The i386 application binary interface specifies the size to be 96 bits, so -m96bit-long-double is the default in 32 bit mode.
Modern architectures (Pentium and newer) would prefer long double to be aligned to an 8 or 16 byte boundary. In arrays or structures conforming to the ABI, this would not be possible. So specifying a -m128bit-long-double will align long double to a 16 byte boundary by padding the long double with an additional 32 bit zero.
In the x86-64 compiler, -m128bit-long-double is the default choice as its ABI specifies that long double is to be aligned on 16 byte boundary.
Notice that neither of these options enable any extra precision over the x87 standard of 80 bits for a long double.
Warning: if you override the default value for your target ABI, the structures and arrays containing long double variables will change their size as well as function calling convention for function taking long double will be modified. Hence they will not be binary compatible with arrays or structures in code compiled without that switch.
-mmlarge-data-threshold=number
When -mcmodel=medium is specified, the data greater than threshold are placed in large data section. This value must be the same across all object linked into the binary and defaults to 65535.
-mrtd
Use a different function-calling convention, in which functions that take a fixed number of arguments return with the ret num instruction, which pops their arguments while returning. This saves one instruction in the caller since there is no need to pop the arguments there.
You can specify that an individual function is called with this calling sequence with the function attribute `stdcall'. You can also override the -mrtd option by using the function attribute `cdecl'. See Function Attributes.
Warning: this calling convention is incompatible with the one normally used on Unix, so you cannot use it if you need to call libraries compiled with the Unix compiler.
Also, you must provide function prototypes for all functions that take variable numbers of arguments (including printf); otherwise incorrect code will be generated for calls to those functions.
In addition, seriously incorrect code will result if you call a function with too many arguments. (Normally, extra arguments are harmlessly ignored.)
-mregparm=num
Control how many registers are used to pass integer arguments. By default, no registers are used to pass arguments, and at most 3 registers can be used. You can control this behavior for a specific function by using the function attribute `regparm'. See Function Attributes.
Warning: if you use this switch, and num is nonzero, then you must build all modules with the same value, including any libraries. This includes the system libraries and startup modules.
-msseregparm
Use SSE register passing conventions for float and double arguments and return values. You can control this behavior for a specific function by using the function attribute `sseregparm'. See Function Attributes.
Warning: if you use this switch then you must build all modules with the same value, including any libraries. This includes the system libraries and startup modules.
-mpc32
-mpc64
-mpc80
Set 80387 floating-point precision to 32, 64 or 80 bits. When -mpc32 is specified, the significands of results of floating-point operations are rounded to 24 bits (single precision); -mpc64 rounds the the significands of results of floating-point operations to 53 bits (double precision) and -mpc80 rounds the significands of results of floating-point operations to 64 bits (extended double precision), which is the default. When this option is used, floating-point operations in higher precisions are not available to the programmer without setting the FPU control word explicitly.
Setting the rounding of floating-point operations to less than the default 80 bits can speed some programs by 2% or more. Note that some mathematical libraries assume that extended precision (80 bit) floating-point operations are enabled by default; routines in such libraries could suffer significant loss of accuracy, typically through so-called "catastrophic cancellation", when this option is used to set the precision to less than extended precision.
-mstackrealign
Realign the stack at entry. On the Intel x86, the -mstackrealign option will generate an alternate prologue and epilogue that realigns the runtime stack. This supports mixing legacy codes that keep a 4-byte aligned stack with modern codes that keep a 16-byte stack for SSE compatibility. The alternate prologue and epilogue are slower and bigger than the regular ones, and the alternate prologue requires an extra scratch register; this lowers the number of registers available if used in conjunction with the regparm attribute. The -mstackrealign option is incompatible with the nested function prologue; this is considered a hard error. See also the attribute force_align_arg_pointer, applicable to individual functions.
-mpreferred-stack-boundary=num
Attempt to keep the stack boundary aligned to a 2 raised to num byte boundary. If -mpreferred-stack-boundary is not specified, the default is 4 (16 bytes or 128 bits).
On Pentium and PentiumPro, double and long double values should be aligned to an 8 byte boundary (see -malign-double) or suffer significant run time performance penalties. On Pentium III, the Streaming SIMD Extension (SSE) data type __m128 may not work properly if it is not 16 byte aligned.
To ensure proper alignment of this values on the stack, the stack boundary must be as aligned as that required by any value stored on the stack. Further, every function must be generated such that it keeps the stack aligned. Thus calling a function compiled with a higher preferred stack boundary from a function compiled with a lower preferred stack boundary will most likely misalign the stack. It is recommended that libraries that use callbacks always use the default setting.
This extra alignment does consume extra stack space, and generally increases code size. Code that is sensitive to stack space usage, such as embedded systems and operating system kernels, may want to reduce the preferred alignment to -mpreferred-stack-boundary=2.
-mmmx
-mno-mmx
-msse
-mno-sse
-msse2
-mno-sse2
-msse3
-mno-sse3
-mssse3
-mno-ssse3
-msse4.1
-mno-sse4.1
-msse4.2
-mno-sse4.2
-msse4
-mno-sse4
-msse4a
-mno-sse4a
-msse5
-mno-sse5
-m3dnow
-mno-3dnow
-mpopcnt
-mno-popcnt
-mabm
-mno-abm
These switches enable or disable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4A, SSE5, ABM or 3DNow! extended instruction sets. These extensions are also available as built-in functions: see X86 Built-in Functions, for details of the functions enabled and disabled by these switches.
To have SSE/SSE2 instructions generated automatically from floating-point code (as opposed to 387 instructions), see -mfpmath=sse.
These options will enable GCC to use these extended instructions in generated code, even without -mfpmath=sse. Applications which perform runtime CPU detection must compile separate files for each supported architecture, using the appropriate flags. In particular, the file containing the CPU detection code should be compiled without these options.
-mcx16
This option will enable GCC to use CMPXCHG16B instruction in generated code. CMPXCHG16B allows for atomic operations on 128-bit double quadword (or oword) data types. This is useful for high resolution counters that could be updated by multiple processors (or cores). This instruction is generated as part of atomic built-in functions: see Atomic Builtins for details.
-msahf
This option will enable GCC to use SAHF instruction in generated 64-bit code. Early Intel CPUs with Intel 64 lacked LAHF and SAHF instructions supported by AMD64 until introduction of Pentium 4 G1 step in December 2005. LAHF and SAHF are load and store instructions, respectively, for certain status flags. In 64-bit mode, SAHF instruction is used to optimize fmod, drem or remainder built-in functions: see Other Builtins for details.
-mrecip
This option will enable GCC to use RCPSS and RSQRTSS instructions (and their vectorized variants RCPPS and RSQRTPS) instead of DIVSS and SQRTSS (and their vectorized variants). These instructions will be generated only when -funsafe-math-optimizations is enabled.
-mveclibabi=type
Specifies the ABI type to use for vectorizing intrinsics using an external library. Supported types are acml for the AMD math core library style of interfacing. GCC will currently emit calls to __vrd2_sin, __vrd2_cos, __vrd2_exp, __vrd2_log, __vrd2_log2, __vrd2_log10, __vrs4_sinf, __vrs4_cosf, __vrs4_expf, __vrs4_logf, __vrs4_log2f, __vrs4_log10f and __vrs4_powf when using this type and -ftree-vectorize is enabled. A ACML ABI compatible library will have to be specified at link time.
-mpush-args
-mno-push-args
Use PUSH operations to store outgoing parameters. This method is shorter and usually equally fast as method using SUB/MOV operations and is enabled by default. In some cases disabling it may improve performance because of improved scheduling and reduced dependencies.
-maccumulate-outgoing-args
If enabled, the maximum amount of space required for outgoing arguments will be computed in the function prologue. This is faster on most modern CPUs because of reduced dependencies, improved scheduling and reduced stack usage when preferred stack boundary is not equal to 2. The drawback is a notable increase in code size. This switch implies -mno-push-args.
-mthreads
Support thread-safe exception handling on `Mingw32'. Code that relies on thread-safe exception handling must compile and link all code with the -mthreads option. When compiling, -mthreads defines -D_MT; when linking, it links in a special thread helper library -lmingwthrd which cleans up per thread exception handling data.
-mno-align-stringops
Do not align destination of inlined string operations. This switch reduces code size and improves performance in case the destination is already aligned, but GCC doesn't know about it.
-minline-all-stringops
By default GCC inlines string operations only when destination is known to be aligned at least to 4 byte boundary. This enables more inlining, increase code size, but may improve performance of code that depends on fast memcpy, strlen and memset for short lengths.
-minline-stringops-dynamically
For string operation of unknown size, inline runtime checks so for small blocks inline code is used, while for large blocks library call is used.
-mstringop-strategy=alg
Overwrite internal decision heuristic about particular algorithm to inline string operation with. The allowed values are rep_byte, rep_4byte, rep_8byte for expanding using i386 rep prefix of specified size, byte_loop, loop, unrolled_loop for expanding inline loop, libcall for always expanding library call.
-momit-leaf-frame-pointer
Don't keep the frame pointer in a register for leaf functions. This avoids the instructions to save, set up and restore frame pointers and makes an extra register available in leaf functions. The option -fomit-frame-pointer removes the frame pointer for all functions which might make debugging harder.
-mtls-direct-seg-refs
-mno-tls-direct-seg-refs
Controls whether TLS variables may be accessed with offsets from the TLS segment register (%gs for 32-bit, %fs for 64-bit), or whether the thread base pointer must be added. Whether or not this is legal depends on the operating system, and whether it maps the segment to cover the entire TLS area.
For systems that use GNU libc, the default is on.
-mfused-madd
-mno-fused-madd
Enable automatic generation of fused floating point multiply-add instructions if the ISA supports such instructions. The -mfused-madd option is on by default. The fused multiply-add instructions have a different rounding behavior compared to executing a multiply followed by an add.
These `-m' switches are supported in addition to the above on AMD x86-64 processors in 64-bit environments.
-m32
-m64
Generate code for a 32-bit or 64-bit environment. The 32-bit environment sets int, long and pointer to 32 bits and generates code that runs on any i386 system. The 64-bit environment sets int to 32 bits and long and pointer to 64 bits and generates code for AMD's x86-64 architecture. For darwin only the -m64 option turns off the -fno-pic and -mdynamic-no-pic options.
-mno-red-zone
Do not use a so called red zone for x86-64 code. The red zone is mandated by the x86-64 ABI, it is a 128-byte area beyond the location of the stack pointer that will not be modified by signal or interrupt handlers and therefore can be used for temporary data without adjusting the stack pointer. The flag -mno-red-zone disables this red zone.
-mcmodel=small
Generate code for the small code model: the program and its symbols must be linked in the lower 2 GB of the address space. Pointers are 64 bits. Programs can be statically or dynamically linked. This is the default code model.
-mcmodel=kernel
Generate code for the kernel code model. The kernel runs in the negative 2 GB of the address space. This model has to be used for Linux kernel code.
-mcmodel=medium
Generate code for the medium model: The program is linked in the lower 2 GB of the address space but symbols can be located anywhere in the address space. Programs can be statically or dynamically linked, but building of shared libraries are not supported with the medium model.
-mcmodel=large
Generate code for the large model: This model makes no assumptions about addresses and sizes of sections.
01 五月, 2008 03:24
昨天已经在赛尔网络、金山软件全面升级到最新版本的FEDNS-2.1-BETA2版本。
升级后运行稳定，界面更友好，更易用。
